SOFF SNU OpenCL Framework for FPGAs

SOFF is an open-source framework that enables OpenCL applications with data-parallel kernels to run on FPGAs. It consists of three components: an OpenCL-C-to-Verilog compiler (soff-compiler), a board support package (soff-hardware-*), and a runtime system (soff-runtime).

SOFF automatically synthesizes a datapath to execute many OpenCL kernel threads in a pipelined manner. It also synthesizes an efficient memory subsystem for the datapath based on the characteristics of OpenCL kernels. Unlike previous high-level synthesis techniques, SOFF adopts a formal way to handle variable-latency instructions, complex control flows, OpenCL barriers, and atomic operations that appear in real-world OpenCL kernels. SOFF is the first OpenCL framework that correctly compiles all applications in the SPEC ACCEL benchmark suite.

Please use the citation below to reference SOFF.

• [ISCA] Gangwon Jo, Heehoon Kim, Jeesoo Lee, and Jaejin Lee. SOFF: An OpenCL High-Level Synthesis Framework for FPGAs, to appear in ISCA ’20: Proceedings of the 47th Annual International Symposium on Computer Architecture, Valencia, Spain, June 2020.

Every component of SOFF can be downloaded from GitHub.

• soff-compiler: https://github.com/mcrl/soff-compiler
• soff-hardware-opae: https://github.com/mcrl/soff-hardware-opae
• soff-runtime: https://github.com/mcrl/soff-runtime

If you would like to download the SOFF user manual, please email us.

Gangwon Jo, Heehoon Kim, Jeesoo Lee, and Jaejin Lee

soff@aces.snu.ac.kr

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    Contact information:
      Center for Manycore Programming
      Department of Computer Science and Engineering
      Seoul National University, Seoul 08826, Korea
      https://thunder.snu.ac.kr
    
    Contributors:
      Gangwon Jo, Heehoon Kim, Jeesoo Lee, and Jaejin Lee