FaCSim A Fast and Cycle-Accurate ARM Architecture Simulator

There have been strong demands for a fast and cycle-accurate virtual platforms in the embedded systems area where developers can do meaningful software development including performance debugging in the context of the entire platform.

FaCSim is a fast and cycle-accurate ARM architecture simulator developed by the members of Advanced Compiler Research Laboratory at Seoul National University and a first step towards such a virtual platform.

FacSim accurately models the ARM9E-S processor core and ARM926EJ-S processor’s memory subsystem. It accurately simulates exceptions and interrupts to enable whole-system simulation including the OS. Since it is implemented in a modular manner in C++, it can be easily extended with other system components by subclassing or adding new classes.

FaCSim is based on an interpretive simulation technique to provide flexibility, yet achieving high speed. It enables fast cycle-accurate architecture simulation by means of three mechanisms. First, it computes elapsed cycles in each pipeline stage as a chunk and incrementally adds it up to advance the core clock instead of performing cycle-by-cycle simulation. Second, it uses a basic-block cache that caches decoded instructions at the basic-block level. Finally, it is parallelized to exploit multicore systems that are available everywhere these days.

Please use the citation below to reference FaCSim.

• [LCTES] Jaejin Lee, Junghyun Kim, Choonki Jang, Seungkyun Kim, Bernhard Egger, Kwangsub Kim, and SangYong Han. FaCSim: A Fast and Cycle-Accurate Architecture Simulator for Embedded Systems. LCTES ’08: Proceedings of the ACM SIGPLAN/SIGBED 2008 International Conference on Languages, Compilers, and Tools for Embedded Systems (also appears in ACM SIGPLAN Notices, Vol. 43,  No. 7, July 2008), pp. 89—99, Tucson, Arizona, USA, June 2008, DOI: 10.1145/1379023.1375670.

• FaCSim builds on most 64-bit flavors of Unix/Linux. You need a little-endian machine (e.g., x86) and gcc 4.1.0 or higher.

If you would like to download the FaCSim, please email us. 

• Getting started with FaCSim
• Configuring FaCSim

• Current: Junghyun Kim, Seungkyun Kim, and Jaejin Lee
• Past: Bernhard Egger, Choonki Jang, Chihun Kim, Kwangsub Kim, and Yoonsung Nam

facsim@aces.snu.ac.kr

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    Contact information:
     Advanced Compiler Research Laboratory
     School of Computer Science and Engineering
     Seoul National University, Seoul 151-744, Korea
    
    https://thunder.snu.ac.kr
    
    Contributors:
     Jaejin Lee, Junghyun Kim, Choonki Jang, Seunkyun Kim, Bernhard Egger,
     Yoonsung Nam, Kwangsub Kim, Jungwon Kim, Posung Chun, and Sangmin Seo